The present invention relates to a dielectric isolated substrate. More particularly, the present invention relates to a dielectric isolated substrate comprising a single crystal silicon support and a process for producing said substrate, as well as to a semiconductor integrated circuit device using said substrate.
In LSI's of high dielectric strength wherein the dielectric strength between elements is as high as several tens of voltages to several hundreds of voltages, it is necessary to perfectly isolate the elements from each other by a dielectric film such as oxide film (SiO.sub.2) or the like. In such a technological field, a so-called dielectric isolated substrate is in wide use.
As well known, many of conventional dielectric isolated substrates employ a composite structure wherein a plurality of single crystal silicon islands are formed on the surface of a polycrystalline silicon support via a dielectric film. In these dielectric isolated substrates of composite structure, however, warpage and strain appear in the substrate owing to, for example, the difference in thermal expansion coefficient between the single crystal silicon and the polycrystalline silicon.
In order to solve the above problem, there have come to be used in recent years dielectric isolated substrates of bonded structure which are described in, for example, Japanese Patent Unexamined Publication Nos. 61-292934, 63-14449 and 63-205926 and whose basic structure is shown in FIG. 2. In FIG. 2, a single crystal silicon support 5 and a single crystal wafer (which later becomes single crystal islands 3) are bonded via a dielectric film 2 to form a bonded structure.
In FIG. 2, semiconductor elements 4 are formed in island-shaped single crystal silicon regions 3, and the single crystal islands 3 are formed on a single crystal silicon support 5 via a dielectric film in such a state that the islands 3 are isolated from each other by the dielectric film 2. The isolation grooves 6 existing between and adjacent to the single crystal islands 3 isolated from each other by the dielectric film 2, are filled with polycrystalline silicon 601 formed for connecting the support 5 and the islands 3.
The process for producing such a dielectric isolated substrate of joint structure is described hereinafter, referring to FIG. 1.
Firstly, one principal surface of single crystal silicon wafer 301 is oxidized to form SiO.sub.2 15 on the entire part of the surface; openings are made at desired places of the SiO.sub.2 15; isolation grooves 6 of about 60 .mu.m in depth are formed at these places by anisotropic etching using, for example, a mixed solution of potassium hydroxide and isopropyl alcohol with the SiO.sub.2 15 used as a mask [see FIG. 1(a)].
Next, the SiO.sub.2 15 used as a mask is removed; the same principal surface of the wafer 301 is oxidized again to form an insulating SiO.sub.2 film 2 on the entire part of the surface [see FIG. 1(b)]; on the surface of the SiO.sub.2 film 2 is accumulated, by chemical vapor deposition, polycrystalline silicon 601 until the isolation grooves 6 are filled completely [see FIG. 1(c)].
Then, the unnecessary portion of the polycrystalline silicon 601 is removed by mechanical cutting and mechanochemical polishing to make the height of the polycrystalline silicon 601 accumulated in the isolation grooves, substantially the same as the surface of the SiO.sub.2 film 2 [see FIG. 1(d)].
Thereafter, the polished surface of the polycrystalline silicon 601 is contacted, by an appropriate means, with one side of a single crystal silicon wafer 5 which later becomes a support; the resulting system is subjected to a heat treatment of higher temperature to bond the two wafers completely [see FIG. 1(e)].
Incidentally, the method for bonding the above two semiconductor wafers to produce a dielectric isolated substrate is described in, for example, Japanese Patent Application No. 62-27040.
Lastly, the unnecessary portion of the single crystal wafer 301 is removed by polishing to form single crystal silicon islands to complete a dielectric isolated substrate 1 [see FIG. 1(f)]; then, desired semiconductor elements are formed on the surfaces of the islands 3; the elements are connected by wiring to complete an integrated circuit device (not shown).
In the above prior art, no sufficient consideration was made for the technique for removing the unnecessary portion of the polycrystalline silicon 601 by polishing to allow the polycrystalline silicon 601 to have a smooth flat surface; therefore, it is difficult to obtain a polished surface having a smoothness degree of about 100 .ANG. or less required in the bonding of wafer thereto, and poor bonding is caused easily.
Moreover, when no complete wafer bonding is achieved owing to the poor bonding, the bonding strength is low; as a result, when semiconductor elements are formed in the islands 3 to produce a semiconductor integrated circuit device, the islands are peeled off from the support 5 or shifted owing to the heat treatment applied for formation of semiconductor elements or owing to the strain caused by the heat generated during the operation of the semiconductor elements. Thereby, the wires connecting the elements are broken and the semiconductor integrated circuit device has reduced reliability.